Add NRZI support
This adds support for encoding and decoding nrzi data. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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Makefile
2
Makefile
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@ -63,7 +63,7 @@ endef
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%.post.fst: rtl/%.post.vvp tb/%.py FORCE
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$(run-vvp)
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MODULES := pcs pmd
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MODULES := pcs pmd nrzi_encode nrzi_decode
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.PHONY: test
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test: $(addsuffix .fst,$(MODULES)) $(addsuffix .post.fst,$(MODULES))
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@ -0,0 +1,39 @@
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// SPDX-License-Identifier: AGPL-3.0-Only
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/*
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* Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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*/
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`include "common.vh"
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module nrzi_decode (
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input clk,
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input [1:0] nrzi,
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input [1:0] nrzi_valid,
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output reg [1:0] nrz,
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output reg [1:0] nrz_valid
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);
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reg [1:0] nrz_next;
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reg nrzi_last;
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reg nrzi_last_next;
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always @(*) begin
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nrz_next[0] = nrzi[1] ^ nrzi[0];
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nrz_next[1] = nrzi[1] ^ nrzi_last;
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nrzi_last_next = nrzi_last;
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if (nrzi_valid != 0)
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nrzi_last_next = nrzi[1];
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if (nrzi_valid & 2)
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nrzi_last_next = nrzi[0];
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end
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always @(posedge clk) begin
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nrzi_last <= nrzi_last_next;
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nrz_valid <= nrzi_valid;
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nrz <= nrz_next;
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end
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`DUMP(0)
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endmodule
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@ -0,0 +1,25 @@
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// SPDX-License-Identifier: AGPL-3.0-Only
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/*
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* Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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*/
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`include "common.vh"
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module nrzi_encode (
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input clk,
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input nrz,
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output reg nrzi
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);
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reg nrzi_next;
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initial nrzi = 1;
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always @(*)
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nrzi_next = nrz ^ nrzi;
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always @(posedge clk)
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nrzi <= nrzi_next;
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`DUMP(0)
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endmodule
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@ -0,0 +1,45 @@
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# SPDX-License-Identifier: AGPL-3.0-Only
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# Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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import random
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import cocotb
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from cocotb.clock import Clock
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from cocotb.regression import TestFactory
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from cocotb.triggers import FallingEdge, RisingEdge, Timer
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from .util import compare_lists, timeout, send_recovered_bits, with_valids
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def nrzi_decode(bits):
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last = 1
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for bit in bits:
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yield bit ^ last
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last = bit
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@timeout(10, 'us')
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async def test_rx(decoder, valids):
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decoder.nrzi_valid.value = 0
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await Timer(1)
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await cocotb.start(Clock(decoder.clk, 8, units='ns').start())
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ins = [random.randrange(2) for _ in range(1000)]
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await cocotb.start(send_recovered_bits(decoder.clk, decoder.nrzi,
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decoder.nrzi_valid, ins, valids))
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outs = []
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await RisingEdge(decoder.clk)
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for _ in ins:
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await RisingEdge(decoder.clk)
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valid = decoder.nrz_valid.value
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if valid == 0:
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pass
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elif valid == 1:
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outs.append(decoder.nrz[1].value)
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else:
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outs.append(decoder.nrz[1].value)
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outs.append(decoder.nrz[0].value)
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# Ignore the first bit, since it is influenced by the initial value
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compare_lists(list(nrzi_decode(ins))[1:], outs[1:])
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with_valids(globals(), test_rx)
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@ -0,0 +1,38 @@
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# SPDX-License-Identifier: AGPL-3.0-Only
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# Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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import random
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import FallingEdge, RisingEdge, Timer
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from .util import compare_lists
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def nrzi_encode(bits):
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last = 1
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for bit in bits:
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yield (last := last ^ bit)
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@cocotb.test(timeout_time=100, timeout_unit='us')
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async def text_encode(encoder):
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ins = [random.randrange(2) for _ in range(1000)]
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encoder.nrz.value = ins[0]
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await Timer(1)
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await cocotb.start(Clock(encoder.clk, 8, units='ns').start())
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async def send_nrz():
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for bit in ins:
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await FallingEdge(encoder.clk)
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encoder.nrz.value = bit
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await cocotb.start(send_nrz())
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outs = []
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await RisingEdge(encoder.clk)
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await RisingEdge(encoder.clk)
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for _ in ins:
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await RisingEdge(encoder.clk)
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outs.append(encoder.nrzi.value)
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# Ignore the first bit, since it is influenced by the initial value
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compare_lists(list(nrzi_encode(ins[1:])), outs[1:])
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