2022-08-24 11:29:09 -05:00
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# SPDX-License-Identifier: AGPL-3.0-Only
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# Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
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import random
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import cocotb
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from cocotb.clock import Clock
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from cocotb.regression import TestFactory
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from cocotb.triggers import ClockCycles, FallingEdge, RisingEdge, Timer
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from cocotb.types import LogicArray
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from .nrzi_encode import nrzi_encode
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from .util import alist, async_iter, compare_lists, timeout, send_recovered_bits, with_valids, print_list_at
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Add phy_core
This module integrates the PCS with the descrambler, implements the PMA
(which is just the link monitor), and implements loopback and coltest
functions. This is more of the PCS/PMA, but the descrambler is
technically part of the PMD, so it's the "core" instead.
We deviate from the standard in one important way: the link doesn't come
up until the descambler is locked. I think this makes sense, since if
the descrambler isn't locked, then the incoming data will be gibberish.
I suspect this isn't part of the standard because the descrambler
doesn't have a locked output in X3.263, so IEEE would have had to
specify it.
Loopback is actually implemented in the PMD, but it modifies the
behavior in several places. It disables collisions (unless
coltest is enabled). Additionally, we need to force the link up (to
avoid the lengthy stabilization timer), but ensure it is down for at
least once cycle (to ensure the descrambler desynchronizes).
On the test side, we just go through the "happy path," as many of the
edge conditions are tested for in the submodule tests. Several of those
tests are modified so that their helper functions can be reused in this
test. In particular, the rx path is now async so that we can feed it
rx_data.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-11-05 11:14:58 -05:00
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async def nrzi_decode(bits):
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last = 1
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Add phy_core
This module integrates the PCS with the descrambler, implements the PMA
(which is just the link monitor), and implements loopback and coltest
functions. This is more of the PCS/PMA, but the descrambler is
technically part of the PMD, so it's the "core" instead.
We deviate from the standard in one important way: the link doesn't come
up until the descambler is locked. I think this makes sense, since if
the descrambler isn't locked, then the incoming data will be gibberish.
I suspect this isn't part of the standard because the descrambler
doesn't have a locked output in X3.263, so IEEE would have had to
specify it.
Loopback is actually implemented in the PMD, but it modifies the
behavior in several places. It disables collisions (unless
coltest is enabled). Additionally, we need to force the link up (to
avoid the lengthy stabilization timer), but ensure it is down for at
least once cycle (to ensure the descrambler desynchronizes).
On the test side, we just go through the "happy path," as many of the
edge conditions are tested for in the submodule tests. Several of those
tests are modified so that their helper functions can be reused in this
test. In particular, the rx path is now async so that we can feed it
rx_data.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2022-11-05 11:14:58 -05:00
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async for bit in bits:
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yield bit ^ last
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last = bit
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@timeout(10, 'us')
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async def test_rx(decoder, valids):
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decoder.nrzi_valid.value = 0
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decoder.nrzi.value = LogicArray('X', 'X')
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decoder.rst.value = 1
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await Timer(1)
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await cocotb.start(Clock(decoder.clk, 8, units='ns').start())
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await ClockCycles(decoder.clk, 1)
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decoder.rst.value = 0
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ins = [random.randrange(2) for _ in range(1000)]
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await cocotb.start(send_recovered_bits(decoder.clk, decoder.nrzi,
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decoder.nrzi_valid, ins, valids))
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outs = []
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await RisingEdge(decoder.clk)
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for _ in ins:
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await RisingEdge(decoder.clk)
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valid = decoder.nrz_valid.value
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if valid == 0:
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pass
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elif valid == 1:
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outs.append(decoder.nrz[1].value)
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else:
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outs.append(decoder.nrz[1].value)
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outs.append(decoder.nrz[0].value)
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# Ignore the first bit, since it is influenced by the initial value
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compare_lists((await alist(nrzi_decode(async_iter(ins))))[1:], outs)
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with_valids(globals(), test_rx)
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