| .. |
|
bitpattern.h
|
Removed unnecessary cast.
|
2015-09-01 12:40:36 +02:00 |
|
calc.cc
|
Respect \A_SIGNED for $shift
|
2020-08-18 19:36:24 +02:00 |
|
cellaigs.cc
|
kernel: big fat patch to use more ID::*, otherwise ID(*)
|
2020-04-02 09:51:32 -07:00 |
|
cellaigs.h
|
Fixed trailing whitespaces
|
2015-07-02 11:14:30 +02:00 |
|
celledges.cc
|
Add flooring division operator
|
2020-05-28 22:59:04 +02:00 |
|
celledges.h
|
Use C++11 final/override keywords.
|
2020-06-18 23:34:52 +00:00 |
|
celltypes.h
|
celltypes: Fix EN port name for some FF types.
|
2020-07-20 23:04:10 +02:00 |
|
consteval.h
|
kernel: big fat patch to use more ID::*, otherwise ID(*)
|
2020-04-02 09:51:32 -07:00 |
|
constids.inc
|
techmap: Add _TECHMAP_CELLNAME_ special parameter.
|
2020-07-21 15:00:54 +02:00 |
|
cost.h
|
Use ID() in kernel/*, add simple ID:: hack (to be improved upon later)
|
2019-08-11 11:39:46 +02:00 |
|
driver.cc
|
tcl -h message only if YOSYS_ENABLE_TCL defined.
|
2020-11-23 21:48:44 -05:00 |
|
ff.h
|
async2sync: Support all FF types.
|
2020-07-30 20:22:03 +02:00 |
|
ffinit.h
|
ffinit: Fortify the code a bit.
|
2020-07-28 17:21:15 +02:00 |
|
hashlib.h
|
dict: Remove guard for past-the-end iterators that might mask problems in static analysis.
|
2020-06-19 21:04:29 +00:00 |
|
log.cc
|
Fix double-free on unmatched logger error pattern
|
2021-02-23 20:49:21 -05:00 |
|
log.h
|
Fix check for bad std::regex (fixes #2606)
|
2021-03-17 23:35:26 +01:00 |
|
macc.h
|
Use (and ignore) the expression provided to log_assert in NDEBUG builds.
|
2020-06-19 15:48:58 +00:00 |
|
mem.cc
|
kernel/mem: defer port removal to emit()
|
2021-05-22 21:42:53 +02:00 |
|
mem.h
|
kernel/mem: defer port removal to emit()
|
2021-05-22 21:42:53 +02:00 |
|
modtools.h
|
modtools: fix use-after-free of cell pointers in ModWalker
|
2021-03-18 13:50:13 +01:00 |
|
register.cc
|
Use C++11 final/override keywords.
|
2020-06-18 23:34:52 +00:00 |
|
register.h
|
Use C++11 final/override keywords.
|
2020-06-18 23:34:52 +00:00 |
|
rtlil.cc
|
rtlil: add const accessors for modules, wires, and cells
|
2021-03-25 10:44:08 -04:00 |
|
rtlil.h
|
rtlil: add const accessors for modules, wires, and cells
|
2021-03-25 10:44:08 -04:00 |
|
satgen.cc
|
Respect \A_SIGNED for $shift
|
2020-08-18 19:36:24 +02:00 |
|
satgen.h
|
satgen: Add support for dffe, sdff, sdffe, sdffce cells.
|
2020-07-24 03:19:21 +02:00 |
|
sigtools.h
|
kernel: const Wire* overload -> Wire* !!!
|
2020-03-26 16:21:30 -07:00 |
|
timinginfo.h
|
timinginfo: Error instead of segfault on const signals.
|
2020-12-15 00:51:16 +01:00 |
|
utils.h
|
Fixed trailing whitespaces
|
2015-07-02 11:14:30 +02:00 |
|
yosys.cc
|
Expose abc and data paths as globals
|
2020-11-06 14:17:15 +01:00 |
|
yosys.h
|
split CodingReadme into multiple files
|
2021-03-22 19:16:25 +01:00 |
ff9e0394b8