riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/manual/PRESENTATION_ExSyn/proc_01.ys

4 lines
57 B
Plaintext
Raw Blame History

read_verilog proc_01.v
hierarchy -check -top test
proc;;
Reference in New Issue View Git Blame Copy Permalink