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riscv
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yosys
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f81bf9bdea
yosys
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techlibs
History
Marcus Comstedt
c9e56bc428
Added iCE40 WARMBOOT cell
2015-08-06 22:58:17 +02:00
..
cmos
Improved liberty file test case
2015-07-06 17:45:56 +02:00
common
Added WORDS parameter to $meminit
2015-07-31 10:40:09 +02:00
ice40
Added iCE40 WARMBOOT cell
2015-08-06 22:58:17 +02:00
xilinx
Fixed trailing whitespaces
2015-07-02 11:14:30 +02:00
.gitignore
added .gitignore files
2013-01-05 11:19:11 +01:00