yosys/passes
Eddie Hung 5939b5d636
Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters
abc9: push inverters driving box inputs (comb outputs) through $lut soft logic
2019-07-16 08:53:47 -07:00
..
cmds bugpoint: add -assigns and -updates options. 2019-07-09 09:27:43 +00:00
equiv Add -undef option to equiv_opt, passed to equiv_induct 2019-04-26 11:16:48 -07:00
fsm fsm_opt: Fix runtime error for FSMs without a reset state 2019-02-07 10:35:36 +00:00
hierarchy Use input default values in hierarchy pass 2019-06-19 11:49:20 +02:00
memory Error out if enable > dbits 2019-07-13 03:39:23 -07:00
opt opt_lut: make less chatty. 2019-07-13 16:49:56 +00:00
pmgen From master 2019-05-28 09:37:50 -07:00
proc Merge pull request #1168 from whitequark/bugpoint-processes 2019-07-09 16:59:43 +02:00
sat Fix tests/various/async FFL test 2019-07-09 22:44:39 +02:00
techmap Merge pull request #1188 from YosysHQ/eddie/abc9_push_inverters 2019-07-16 08:53:47 -07:00
tests flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00