yosys/techlibs
Clifford Wolf 7ea0a5937b
Merge pull request #1449 from pepijndevos/gowin
Improvements for gowin support
2019-11-19 17:29:27 +01:00
..
achronix Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
anlogic make note that it is for latch mode 2019-09-18 17:48:16 +02:00
common Do not map $eq and $ne in cmp2lut, only proper arithmetic cmp 2019-11-11 15:07:29 +01:00
coolrunner2 Fix spacing 2019-08-06 16:47:55 -07:00
easic Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ecp5 ecp5: Use new autoname pass for better cell/net names 2019-11-15 21:03:11 +00:00
efinix FF should be initialized to 0 2019-10-04 13:27:10 +02:00
gowin Remove dff init altogether 2019-11-19 15:53:44 +01:00
greenpak4 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
ice40 Merge pull request #1490 from YosysHQ/clifford/autoname 2019-11-14 18:03:44 +01:00
intel techlibs/intel: Clean up Makefile 2019-08-05 11:22:11 -07:00
sf2 Revert "synth_* with -retime option now calls abc with -D 1 as well" 2019-04-18 07:59:16 -07:00
xilinx xilinx: Add simulation models for MULT18X18* and DSP48A*. 2019-11-19 01:00:58 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00