David Shah c3997c77a5 verilog: Add location info for generate constructs ... Signed-off-by: David Shah <dave@ds0.me>		2020-04-01 18:47:20 +01:00
..
.gitignore	Add "make coverage"	2018-08-27 14:22:21 +02:00
Makefile.inc	Add one mode dependency	2020-03-19 16:53:40 +01:00
const2ast.cc	Fix handling of z_digit "?" and fix optimization of cmp with "z"	2019-09-13 13:39:39 +02:00
preproc.cc	Add support for SystemVerilog-style `define to Verilog frontend	2020-03-27 16:08:26 +00:00
preproc.h	Add support for SystemVerilog-style `define to Verilog frontend	2020-03-27 16:08:26 +00:00
verilog_frontend.cc	Merge pull request #1811 from PeterCrozier/typedef_scope	2020-03-30 13:55:39 +02:00
verilog_frontend.h	Merge pull request #1811 from PeterCrozier/typedef_scope	2020-03-30 13:55:39 +02:00
verilog_lexer.l	Error duplicate declarations of a typedef name in the same scope.	2020-03-24 14:35:21 +00:00
verilog_parser.y	verilog: Add location info for generate constructs	2020-04-01 18:47:20 +01:00