yosys/passes
Jannis Harder 7036a312bf stat: Fix JSON output for empty designs 2022-12-02 14:36:19 +01:00
..
cmds stat: Fix JSON output for empty designs 2022-12-02 14:36:19 +01:00
equiv Add "check -assert" to equiv_opt 2022-10-07 16:04:51 +02:00
fsm mention prerequisites in fsm_detect and fsm help 2022-11-21 16:07:23 +01:00
hierarchy Support importing verilog configurations using Verific 2022-11-25 13:02:11 +01:00
memory Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
opt Consistent $mux undef handling 2022-10-24 12:03:01 +02:00
pmgen Fitting help messages to 80 character width 2022-08-24 10:40:57 +12:00
proc proc_rom: Add special handling of const-0 address bits. 2022-05-18 17:32:30 +02:00
sat sat: Add -set-def-formal option to force defined $any* outputs 2022-11-28 14:50:52 +01:00
techmap Fix crash in flowmap 2022-09-20 14:31:19 +02:00
tests Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00