mirror of https://github.com/YosysHQ/yosys.git
15 lines
920 B
Makefile
15 lines
920 B
Makefile
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OBJS += techlibs/intel/synth_intel.o
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/m9k_bb.v))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/altpll_bb.v))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_m9k.txt))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/brams_map_m9k.v))
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$(eval $(call add_share_file,share/intel/common,techlibs/intel/common/ff_map.v))
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# Add the cell models and mappings for the VQM backend
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families := max10 arria10gx cyclonev cyclone10lp cycloneiv cycloneive
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$(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_sim.v)))
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$(foreach family,$(families), $(eval $(call add_share_file,share/intel/$(family),techlibs/intel/$(family)/cells_map.v)))
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#$(eval $(call add_share_file,share/intel/cycloneive,techlibs/intel/cycloneive/arith_map.v))
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