yosys/tests
Clifford Wolf fb2bf934dc Added correct handling of $memwr priority 2014-01-03 00:22:17 +01:00
..
asicworld Fixed undef behavior in tests/asicworld/code_verilog_tutorial_fsm_full_tb.v 2013-05-24 15:15:59 +02:00
hana added more .gitignore files (make test) 2013-01-05 11:35:52 +01:00
i2c_bench Renamed stdcells_sim.v to simcells.v and fixed blackbox.v 2013-11-24 20:44:00 +01:00
k68_vltor Now only use value from "initial" when no matching "always" block is found 2013-03-31 11:51:12 +02:00
simple Added correct handling of $memwr priority 2014-01-03 00:22:17 +01:00
tools Added autotest.sh -p option 2014-01-02 17:52:48 +01:00