yosys/techlibs/xilinx/tests
David Shah e7dbe7bb3d DSP48E1 sim model: seq test working
Signed-off-by: David Shah <dave@ds0.me>
2019-08-08 10:52:04 +01:00
..
.gitignore [wip] sim model testing 2019-08-08 10:05:11 +01:00
bram1.sh Improved xilinx "bram1" test 2015-04-09 17:12:12 +02:00
bram1.v Added support for initialized xilinx brams 2015-04-06 17:07:10 +02:00
bram1_tb.v Added support for initialized xilinx brams 2015-04-06 17:07:10 +02:00
bram2.sh Added support for initialized xilinx brams 2015-04-06 17:07:10 +02:00
bram2.v Added support for initialized xilinx brams 2015-04-06 17:07:10 +02:00
bram2_tb.v Added support for initialized xilinx brams 2015-04-06 17:07:10 +02:00
test_dsp_model.sh DSP48E1 sim model: seq test working 2019-08-08 10:52:04 +01:00
test_dsp_model.v DSP48E1 sim model: seq test working 2019-08-08 10:52:04 +01:00