yosys/docs/source/using_yosys/synthesis
Krystine Sherwin a33b1b6059
More work on example_synth
Added highlighting in (most) schematics.
Written down to end of coarse-grain, with a couple of TODOs for filling in gaps.
Includes `techmap_synth.rst` stub.
2023-12-18 17:49:15 +13:00
..
abc.rst Updated ABC info 2023-12-13 10:08:45 +13:00
cell_libs.rst Add cell_libs.rst 2023-12-14 10:08:46 +13:00
fsm.rst Removing typical phases doc 2023-12-07 17:14:21 +13:00
index.rst More work on example_synth 2023-12-18 17:49:15 +13:00
memory.rst TODOs 2023-12-12 12:05:45 +13:00
opt.rst TODOs 2023-12-12 12:05:45 +13:00
proc.rst Removing typical phases doc 2023-12-07 17:14:21 +13:00
synth.rst TODOs 2023-12-12 12:05:45 +13:00
techmap_synth.rst More work on example_synth 2023-12-18 17:49:15 +13:00