Pepijn de Vos b8329df1d0 add GW2A and GW5A cells		2024-11-17 20:25:11 +01:00
..
Makefile.inc	gowin: Add all the primitives.	2023-04-22 17:10:53 +10:00
arith_map.v	gowin: Fix X output of $alu techmap	2023-05-01 17:56:41 +02:00
brams.txt	gowin: Change BYTE ENABLE handling.	2024-01-27 17:19:49 +10:00
brams_map.v	gowin: Fix SDP write enable port.	2024-01-30 17:06:59 +10:00
cells_map.v	iopadmap: Add native support for negative-polarity output enable.	2021-11-09 15:40:16 +01:00
cells_sim.v	Gowin. Add the EMCU primitive.	2024-09-11 10:18:51 +10:00
cells_xtra.py	add GW2A and GW5A cells	2024-11-17 20:25:11 +01:00
cells_xtra.v	add GW2A and GW5A cells	2024-11-17 20:25:11 +01:00
lutrams.txt	gowin: Use `memory_libmap` pass.	2022-05-18 17:32:56 +02:00
lutrams_map.v	gowin: Use `memory_libmap` pass.	2022-05-18 17:32:56 +02:00
synth_gowin.cc	Fix some synth_* help messages	2024-03-18 11:33:18 +13:00