yosys/techlibs
Clifford Wolf 31755ed1cf Changed ice40 ICESTORM_CARRYCONST port name 2015-04-16 12:09:14 +02:00
..
cmos Fixes in cmos_cells.v 2015-03-25 09:00:41 +01:00
common make all vector-size related integer params in $mem sim model signed 2015-04-05 17:26:53 +02:00
ice40 Changed ice40 ICESTORM_CARRYCONST port name 2015-04-16 12:09:14 +02:00
xilinx Improved xilinx "bram1" test 2015-04-09 17:12:12 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00