mirror of https://github.com/YosysHQ/yosys.git
dc77563a6a
Strategically inserting the pending memory write in memory::update to keep the queue sorted allows us to skip the queue sort in memory::commit. The Minerva SRAM SoC runs ~7% faster as a result. |
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Makefile.inc | ||
cxxrtl.cc | ||
cxxrtl.h |