.. |
tests
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Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"
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2019-08-12 12:06:45 -07:00 |
Makefile.inc
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ice40: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
abc9_model.v
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Fix icestorm links
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2021-06-09 12:39:12 +02:00 |
arith_map.v
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
brams.txt
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ice40: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
brams_map.v
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ice40: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
cells_map.v
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Add force_downto and force_upto wire attributes.
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2020-05-19 01:42:40 +02:00 |
cells_sim.v
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ice40: Fix path delay definitions
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2023-03-10 10:48:05 +01:00 |
dsp_map.v
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Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing
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2019-08-08 12:56:05 -07:00 |
ff_map.v
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ice40: Use dfflegalize.
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2020-07-05 05:12:09 +02:00 |
ice40_braminit.cc
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
ice40_opt.cc
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Fixing old e-mail addresses and deadnames
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2021-06-08 00:39:36 +02:00 |
latches_map.v
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Added synth_ice40 support for latches via logic loops
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2016-05-06 23:02:37 +02:00 |
spram.txt
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ice40: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
spram_map.v
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ice40: Use `memory_libmap` pass.
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2022-05-18 17:32:56 +02:00 |
synth_ice40.cc
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ice40, ecp5, gowin: enable ABC9 by default
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2023-11-13 15:28:13 +00:00 |