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yosys/tests/proc
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Zachary Snow c016f6a423 proc_rmdead: use explicit pattern set when there are no wildcards 
If width of a case expression was large, explicit patterns could cause
the existing logic to take an extremely long time, or exhaust the
maximum size of the underlying set. For cases where all of the patterns
are fully defined and there are no constants in the case expression,
this change uses a simple set to track which patterns have been seen.
 		2021-07-29 20:55:59 -04:00
..
.gitignore proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
bug2619.ys proc_dff: Fix emitted FF when a register is not assigned in async reset 2021-03-08 17:01:43 +01:00
bug2656.ys proc_arst: Add special-casing of clock signal in conditionals. 2021-03-15 17:17:29 +01:00
bug_1268.v proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
bug_1268.ys proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
rmdead.v proc_rmdead: use explicit pattern set when there are no wildcards 2021-07-29 20:55:59 -04:00
rmdead.ys proc_rmdead: use explicit pattern set when there are no wildcards 2021-07-29 20:55:59 -04:00
run-test.sh proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00