yosys/techlibs/quicklogic
Miodrag Milanovic d71dd5b9bb Fix out of tree build 2023-12-06 09:11:51 +01:00
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common synth_quicklogic: rearrange files to prepare for adding more architectures 2023-12-04 15:52:02 +01:00
pp3 synth_quicklogic: rearrange files to prepare for adding more architectures 2023-12-04 15:52:02 +01:00
qlf_k6n10f quicklogic: Generate `bram_types_sim.v` at build time 2023-12-04 18:21:00 +01:00
.gitignore add dsp inference 2023-12-04 15:52:02 +01:00
Makefile.inc pmgen: Have a single make pattern 2023-12-05 18:30:13 +01:00
ql_bram_merge.cc add dsp inference 2023-12-04 15:52:02 +01:00
ql_bram_types.cc add dsp inference 2023-12-04 15:52:02 +01:00
ql_dsp_io_regs.cc ql_dsp_io_regs: Fix ID strings, constant detection 2023-12-04 15:52:03 +01:00
ql_dsp_macc.cc Fix out of tree build 2023-12-06 09:11:51 +01:00
ql_dsp_macc.pmg ql_dsp_macc: Tune DSP inference code 2023-12-04 15:52:02 +01:00
ql_dsp_simd.cc ql_dsp_*: Clean up 2023-12-04 15:52:02 +01:00
synth_quicklogic.cc synth_quicklogic: Fix missing FF mapping 2023-12-04 15:52:03 +01:00