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yosys
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d3b6b7fe98
yosys
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examples
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intel
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DE2i-150
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quartus_compile
History
Clifford Wolf
b72a7e1104
Replace CRLF line endings with LF in de2i.qsf (quartus example)
2017-04-12 16:51:46 +02:00
..
de2i.qpf
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
2017-04-05 23:01:29 -05:00
de2i.qsf
Replace CRLF line endings with LF in de2i.qsf (quartus example)
2017-04-12 16:51:46 +02:00
runme_quartus
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
2017-04-05 23:01:29 -05:00