Clifford Wolf cdf0f10760 Fixed dfflibmap for cell libraries with no set-reset-ff		2014-02-15 16:34:12 +01:00
..
abc	Added abc -keepff option	2014-02-14 11:28:42 +01:00
cmds	Added delete {-input|-output|-port}	2014-02-09 10:03:26 +01:00
fsm	Fixes in fsm detect/extract for better detection of non-fsm circuits	2013-12-06 12:53:20 +01:00
hierarchy	Implemented read_verilog -defer	2014-02-13 13:59:13 +01:00
memory	Fixed bug in collecting of RD_TRANSPARENT parameter in memory_collect	2014-02-08 19:13:19 +01:00
opt	Fixed opt_const handling of double invert with non-1 output width	2014-02-15 13:16:08 +01:00
proc	Tiny cleanup in proc_mux.cc	2014-01-03 16:54:59 +01:00
sat	Various improvements in expose command (added -sep and -cut)	2014-02-09 11:07:46 +01:00
techmap	Fixed dfflibmap for cell libraries with no set-reset-ff	2014-02-15 16:34:12 +01:00