yosys/frontends/ast
Clifford Wolf 52f80718a7
Merge pull request #848 from YosysHQ/clifford/fix763
Fix error for wire decl in always block, fixes 763
2019-03-02 16:32:58 -08:00
..
Makefile.inc Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) 2014-08-21 12:43:51 +02:00
ast.cc Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ast.h Only run derive on blackbox modules when ports have dynamic size 2019-03-02 12:36:46 -08:00
dpicall.cc Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
genrtlil.cc Fix error for wire decl in always block, fixes #763 2019-03-02 11:56:44 -08:00
simplify.cc Only run derive on blackbox modules when ports have dynamic size 2019-03-02 12:36:46 -08:00