mirror of https://github.com/YosysHQ/yosys.git
42 lines
699 B
Plaintext
42 lines
699 B
Plaintext
read_verilog C880.v
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techmap
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flatten
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select C880_lev2
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glift -create-instrumented-model
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techmap
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opt
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rename C880_lev2 uut
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cd ..
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delete [AIONX][NVXR]2
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read_verilog C880.v
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techmap
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flatten
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select C880_lev2
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glift -create-precise-model
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techmap
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opt
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rename C880_lev2 spec
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cd ..
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delete [AIONX][NVXR]2
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design -push-copy
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miter -equiv spec uut miter
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flatten
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delete uut spec
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techmap
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opt
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stat miter
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qbfsat -O2 -write-solution C880.soln -solver yices -timeout 3600 -nocleanup -assume-outputs -assume-negative-polarity miter
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design -pop
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stat
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copy uut solved
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qbfsat -specialize-from-file C880.soln solved
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opt solved
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miter -equiv spec solved satmiter
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flatten
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sat -prove trigger 0 satmiter
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delete satmiter
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stat
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shell
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