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.gitignore
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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add_sub.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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adffs.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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bug1459.ys
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Add testcase from #1459
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2020-01-06 16:22:22 -08:00 |
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bug1598.ys
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Add #1598 testcase
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2019-12-27 16:44:57 -08:00 |
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bug1630.il.gz
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Add #1630 testcase
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2020-01-13 21:27:53 -08:00 |
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bug1630.ys
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Update bug1630.ys to use -lut 4 instead of lut file
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2020-02-27 10:17:29 -08:00 |
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counter.ys
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Call equiv_opt with -multiclock and -assert
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2019-12-31 18:39:32 -08:00 |
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dffs.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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dpram.v
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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dpram.ys
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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fsm.ys
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Replace opt_rmdff with opt_dff.
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2020-08-07 13:21:03 +02:00 |
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latches.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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latches_abc9.ys
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tests: tidy up testcase
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2020-06-03 08:41:55 -07:00 |
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logic.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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lutram.ys
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Rename memory tests to lutram, add more xilinx tests
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2019-12-12 17:44:37 -08:00 |
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macc.v
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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macc.ys
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Do not do call equiv_opt when no sim model exists
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2019-12-31 18:40:30 -08:00 |
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memories.ys
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tests: remove write_ilang
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2020-04-20 15:42:29 -07:00 |
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mul.ys
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Do not do call equiv_opt when no sim model exists
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2019-12-31 18:40:30 -08:00 |
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mux.ys
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Update tests with reduced area
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2020-01-21 16:50:04 -08:00 |
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opt_lut_ins.ys
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Add opt_lut_ins pass. (#1673)
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2020-02-03 14:57:17 +01:00 |
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rom.v
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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rom.ys
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Moved all tests in arch sub directory
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2019-10-18 11:06:12 +02:00 |
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run-test.sh
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Fix path to yosys
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2019-10-18 11:12:03 +02:00 |
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shifter.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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tribuf.ys
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Share common tests
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2019-10-18 12:19:59 +02:00 |
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