mirror of https://github.com/YosysHQ/yosys.git
13 lines
653 B
Makefile
13 lines
653 B
Makefile
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OBJS += techlibs/anlogic/synth_anlogic.o
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OBJS += techlibs/anlogic/anlogic_eqn.o
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OBJS += techlibs/anlogic/anlogic_determine_init.o
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams.txt))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams_map.v))
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$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/dram_init_16x4.vh))
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