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yosys/kernel
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Zachary Snow e833c6a418 verilog: use derived module info to elaborate cell connections 
- Attempt to lookup a derived module if it potentially contains a port
  connection with elaboration ambiguities
- Mark the cell if module has not yet been derived
- This can be extended to implement automatic hierarchical port
  connections in a future change
 		2021-10-25 18:25:50 -07:00
..
binding.cc Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
binding.h Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
bitpattern.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
calc.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
cellaigs.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
cellaigs.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
celledges.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
celledges.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
celltypes.h Add $aldff and $aldffe: flip-flops with async load. 2021-10-02 18:12:52 +02:00
consteval.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
constids.inc verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
cost.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
driver.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
ff.cc FfData: some refactoring. 2021-10-07 04:24:06 +02:00
ff.h FfData: some refactoring. 2021-10-07 04:24:06 +02:00
ffinit.h Add new helper class for merging FFs into cells, use for memory_dff. 2021-05-23 14:46:59 +02:00
ffmerge.cc Fix a regression from #3035. 2021-10-08 15:44:07 +02:00
ffmerge.h Add new helper class for merging FFs into cells, use for memory_dff. 2021-05-23 14:46:59 +02:00
hashlib.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
log.cc logger: Add -check-expected subcommand. 2021-08-12 17:41:39 +02:00
log.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
macc.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
mem.cc FfData: some refactoring. 2021-10-07 04:24:06 +02:00
mem.h kernel/mem: Introduce transparency masks. 2021-08-11 00:04:16 +02:00
modtools.h Refactor common parts of SAT-using optimizations into a helper. 2021-08-09 16:54:35 +02:00
qcsat.cc Refactor common parts of SAT-using optimizations into a helper. 2021-08-09 16:54:35 +02:00
qcsat.h Refactor common parts of SAT-using optimizations into a helper. 2021-08-09 16:54:35 +02:00
register.cc Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
register.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
rtlil.cc verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
rtlil.h verilog: use derived module info to elaborate cell connections 2021-10-25 18:25:50 -07:00
satgen.cc kernel/ff: Refactor FfData to enable FFs with async load. 2021-10-02 20:19:48 +02:00
satgen.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
sigtools.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
timinginfo.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
utils.h Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
yosys.cc Fix WASI build after commit 1d88bea1. 2021-06-19 02:59:57 +00:00
yosys.h rtlil: Make Process handling more uniform with Cell and Wire. 2021-07-12 00:47:34 +02:00