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yosys/passes
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Rupert Swarbrick bd16d01c0e Split out logic for reprocessing an AstModule 
This will enable other features to use same core logic for replacing an
existing AstModule with a newly elaborated version.
 		2021-10-25 18:25:50 -07:00
..
cmds Hook up $aldff support in various passes. 2021-10-02 21:01:21 +02:00
equiv Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
fsm Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
hierarchy Split out logic for reprocessing an AstModule 2021-10-25 18:25:50 -07:00
memory FfData: some refactoring. 2021-10-07 04:24:06 +02:00
opt FfData: some refactoring. 2021-10-07 04:24:06 +02:00
pmgen Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00
proc proc_prune: Make assign removal and promotion per-bit, remember promoted bits. 2021-08-14 15:26:11 +02:00
sat FfData: some refactoring. 2021-10-07 04:24:06 +02:00
techmap Change implicit conversions from bool to Sig* to explicit. 2021-10-21 20:20:31 +02:00
tests Fixing old e-mail addresses and deadnames 2021-06-08 00:39:36 +02:00