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riscv
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yosys
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bc48500548
yosys
/
passes
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Jannis Harder
bc48500548
tribuf: `-formal` option: convert all to logic and detect conflicts
2022-04-12 12:46:22 +02:00
..
cmds
show: Fix width labels.
2022-04-04 22:48:09 +02:00
equiv
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
fsm
Fixing old e-mail addresses and deadnames
2021-06-08 00:39:36 +02:00
hierarchy
Reorder steps in -auto-top to fix synth command,
fixes
#3261
2022-04-05 14:02:37 +02:00
memory
memory_bram: Make use of new mem emulation functions to map more RAMs.
2022-01-27 19:31:27 +01:00
opt
opt_merge: Add `-keepdc` option required for formal verification
2022-04-01 21:03:20 +02:00
pmgen
Update comment
2022-02-02 03:21:09 +01:00
proc
proc_dff: Emit $aldff.
2021-10-27 14:14:24 +02:00
sat
Use wrap_async_control_gate if ff is fine
2022-04-08 16:30:29 +02:00
techmap
tribuf: `-formal` option: convert all to logic and detect conflicts
2022-04-12 12:46:22 +02:00
tests
Add $bmux and $demux cells.
2022-01-28 23:34:41 +01:00