yosys/passes
Clifford Wolf b7fcf1fb9a keep $mux and $_MUX_ optimizations separate in opt_const 2013-03-19 13:32:04 +01:00
..
abc Fixed abc eeror handling 2013-03-18 07:31:59 +01:00
dfflibmap Added more help messages (extract, abc, dfflibmap) 2013-02-28 11:14:59 +01:00
extract Split extract -attr into extract -cell_attr and -wire_attr 2013-03-08 08:19:24 +01:00
fsm fixed typos 2013-03-18 07:28:31 +01:00
hierarchy Implemented general handler for selection arguments 2013-03-03 10:05:37 +01:00
memory Added help messages to memory_* passes 2013-03-01 10:17:35 +01:00
opt keep $mux and $_MUX_ optimizations separate in opt_const 2013-03-19 13:32:04 +01:00
proc fixed typos 2013-03-18 07:28:31 +01:00
scc fixed typos 2013-03-18 07:28:31 +01:00
submod fixed typos 2013-03-18 07:28:31 +01:00
techmap Removed date from auto-generated passes/techmap/stdcells.inc 2013-03-18 07:32:33 +01:00