yosys/techlibs/gowin
Pepijn de Vos be836f4af3 gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
..
Makefile.inc gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
arith_map.v gowin: Fix X output of $alu techmap 2023-05-01 17:56:41 +02:00
brams.txt gowin: Change BYTE ENABLE handling. 2024-01-27 17:19:49 +10:00
brams_map.v gowin: Fix SDP write enable port. 2024-01-30 17:06:59 +10:00
cells_map.v iopadmap: Add native support for negative-polarity output enable. 2021-11-09 15:40:16 +01:00
cells_sim.v Gowin. Add the EMCU primitive. 2024-09-11 10:18:51 +10:00
cells_xtra.py gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
cells_xtra_gw1n.v gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
cells_xtra_gw2a.v gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
cells_xtra_gw5a.v gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00
lutrams.txt gowin: Use `memory_libmap` pass. 2022-05-18 17:32:56 +02:00
lutrams_map.v gowin: Use `memory_libmap` pass. 2022-05-18 17:32:56 +02:00
synth_gowin.cc gowin: split cells_xtra by family 2024-11-26 15:42:22 +01:00