riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
yosys/passes
History
Clifford Wolf a7988c01af Copy attributes from state signal to fsm cell 2013-01-05 11:44:47 +01:00
..
abc initial import 2013-01-05 11:13:26 +01:00
dfflibmap initial import 2013-01-05 11:13:26 +01:00
fsm Copy attributes from state signal to fsm cell 2013-01-05 11:44:47 +01:00
hierarchy initial import 2013-01-05 11:13:26 +01:00
memory initial import 2013-01-05 11:13:26 +01:00
opt initial import 2013-01-05 11:13:26 +01:00
proc initial import 2013-01-05 11:13:26 +01:00
submod initial import 2013-01-05 11:13:26 +01:00
techmap added .gitignore files 2013-01-05 11:19:11 +01:00