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riscv
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yosys
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ac896c63e2
yosys
/
techlibs
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common
History
Clifford Wolf
fc3b3c4ec3
Added $slice and $concat cell types
2014-02-07 17:44:57 +01:00
..
Makefile.inc
Added techlibs/common/pmux2mux.v
2014-01-17 20:06:15 +01:00
blackbox.sed
Renamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 20:44:00 +01:00
pmux2mux.v
Added techlibs/common/pmux2mux.v
2014-01-17 20:06:15 +01:00
simcells.v
Renamed stdcells_sim.v to simcells.v and fixed blackbox.v
2013-11-24 20:44:00 +01:00
simlib.v
Added $slice and $concat cell types
2014-02-07 17:44:57 +01:00
stdcells.v
Added $slice and $concat cell types
2014-02-07 17:44:57 +01:00