This website requires JavaScript.
Explore
Help
Sign In
riscv
/
yosys
mirror of
https://github.com/YosysHQ/yosys.git
Watch
1
Star
0
Fork
You've already forked yosys
0
Code
Issues
Projects
Releases
Wiki
Activity
ab6e8ce0f0
yosys
/
techlibs
/
intel
/
common
History
Diego H
819ca73096
Changes in GoWin synth commands and ALU primitive support
2018-12-03 20:08:35 -06:00
..
altpll_bb.v
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00
brams.txt
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00
brams_map.v
Changes in GoWin synth commands and ALU primitive support
2018-12-03 20:08:35 -06:00
m9k_bb.v
Clean whitespace and permissions in techlibs/intel
2017-10-05 16:23:49 +02:00