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yosys/techlibs/xilinx7
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Clifford Wolf 6685ad436e Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos) 2013-08-27 13:12:26 +02:00
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cells.v Added simple xilinx7 technology mapping files 2013-08-22 20:31:04 +02:00
counter.v Added simple xilinx7 technology mapping files 2013-08-22 20:31:04 +02:00
counter_tb.v Added simple xilinx7 technology mapping files 2013-08-22 20:31:04 +02:00
run_testbench.sh Added mapping to techlibs/xilinx7 testbench (exposes EDIF backend todos) 2013-08-27 13:12:26 +02:00