yosys/passes
Clifford Wolf 9ec50ca7b9
Merge pull request #896 from YosysHQ/transp_fixes
memory_bram: Fix multiclock make_transp
2019-03-25 14:55:16 +01:00
..
cmds Hotfix for 4c82ddf 2019-02-21 19:27:23 +01:00
equiv Fix equiv_opt indenting 2018-12-16 15:57:28 +01:00
fsm fsm_opt: Fix runtime error for FSMs without a reset state 2019-02-07 10:35:36 +00:00
hierarchy Only run derive on blackbox modules when ports have dynamic size 2019-03-02 12:36:46 -08:00
memory memory_bram: Fix multiclock make_transp 2019-03-24 16:21:36 +00:00
opt Trim init attributes when resizing FFs in "wreduce", fixes #887 2019-03-22 11:42:19 +01:00
pmgen Fix spelling in pmgen/README.md 2019-03-05 17:55:29 -08:00
proc proc_clean: fix critical typo. 2019-01-23 22:08:38 +00:00
sat Add "mutate -none -mode", "mutate -mode none" 2019-03-23 20:20:32 +01:00
techmap spaces -> tabs 2019-03-25 14:12:04 +01:00
tests flowmap: implement depth relaxation. 2019-01-08 01:13:05 +00:00