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9b820108d6
yosys
/
tests
/
opt
/
opt_expr_constconn.v
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module
top
(
.
.
.
)
;
input
[
7
:
0
]
A
;
output
[
7
:
0
]
B
;
wire
[
7
:
0
]
C
=
3
;
assign
B
=
A
+
C
;
endmodule
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