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Clifford Wolf 88db09255b Added autotest -e (do not use -noexpr on write_verilog) 2014-08-30 18:34:07 +02:00
..
.gitignore added more .gitignore files (make test) 2013-01-05 11:35:52 +01:00
README Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
hana_vlib.v initial import 2013-01-05 11:13:26 +01:00
run-test.sh Added autotest -e (do not use -noexpr on write_verilog) 2014-08-30 18:34:07 +02:00
test_intermout.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_parse2synthtrans.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_parser.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_always.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_and.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_buffer.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_decoder.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_inc.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_mux.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_nand.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_nor.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_or.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_seq.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_shifter.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_sop.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_techmap.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_techmap_tech.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_vlib.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_xnor.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00
test_simulation_xor.v Consolidated hana test benches into fewer files 2014-08-01 03:57:37 +02:00

README 

This test cases are copied from the hana project:
https://sourceforge.net/projects/sim-sim/