yosys/passes
Martin Povišer a00137c2f6
Merge pull request #4625 from povik/cellmatch-lut
cellmatch: Size the `lut` attribute
2024-10-11 14:08:55 +02:00
..
cmds Add TODO for missing help messages 2024-10-08 08:47:51 +02:00
equiv equiv_simple: Take FFs into account for driver map 2024-02-21 12:05:52 +01:00
fsm add option to fsm_detect to ignore self-resetting 2023-01-30 16:12:53 +01:00
hierarchy cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00
memory memory_map: Explain `-iattr` better 2024-03-06 15:15:37 +01:00
opt Merge pull request #4176 from povik/opt_expr-performance 2024-07-15 16:10:25 +02:00
pmgen Merge pull request #4452 from phsauter/shiftadd-underflow-fix 2024-08-19 15:45:46 +02:00
proc proc_dff: respect sync rule priorities when generating complex dffsrs 2024-08-28 15:48:07 +01:00
sat add -fst-noinit flag to sim for not initializing the state from the fst file 2024-08-21 11:03:29 +01:00
techmap Merge pull request #4625 from povik/cellmatch-lut 2024-10-11 14:08:55 +02:00
tests cost: add model for techmapped cell count, keep_hierarchy pass with -min_cost parameter 2024-07-29 10:26:02 +02:00