yosys/docs/source/code_examples/intro
Krystine Sherwin 3a153f99db
Add cell_libs.rst
Updates code examples, removing `counter_outputs.ys` in favour of a single script.  Also adds a .gitignore for the output file `synth.v`.
`example_synth.rst` still pending updated example.
2023-12-14 10:08:46 +13:00
..
.gitignore Add cell_libs.rst 2023-12-14 10:08:46 +13:00
Makefile Add cell_libs.rst 2023-12-14 10:08:46 +13:00
counter.v docs: moving code examples 2023-11-14 12:55:39 +13:00
counter.ys Add cell_libs.rst 2023-12-14 10:08:46 +13:00
mycells.lib docs: moving code examples 2023-11-14 12:55:39 +13:00
mycells.v docs: moving code examples 2023-11-14 12:55:39 +13:00