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module NOT(A, Y);
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input A;
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output Y = ~A;
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endmodule
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|
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module NAND(A, B, Y);
|
|
input A, B;
|
|
output Y = ~(A & B);
|
|
endmodule
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|
|
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module NOR(A, B, Y);
|
|
input A, B;
|
|
output Y = ~(A | B);
|
|
endmodule
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|
|
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module DFF(C, D, Q);
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|
input C, D;
|
|
output reg Q;
|
|
always @(posedge C)
|
|
Q <= D;
|
|
endmodule
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|
|