yosys/techlibs/xilinx/brams.txt

68 lines
1018 B
Plaintext

bram $__XILINX_RAMB36_SDP
abits 9
dbits 72
groups 2
ports 1 1
wrmode 0 1
enable 0 8
transp 0 0
clocks 2 3
clkpol 2 3
endbram
bram $__XILINX_RAMB18_SDP
abits 9
dbits 36
groups 2
ports 1 1
wrmode 0 1
enable 0 4
transp 0 0
clocks 2 3
clkpol 2 3
endbram
bram $__XILINX_RAMB18_TDP
abits 10 @a10d18
dbits 18 @a10d18
abits 11 @a11d9
dbits 9 @a11d9
abits 12 @a12d4
dbits 4 @a12d4
abits 13 @a13d2
dbits 2 @a13d2
abits 14 @a14d1
dbits 1 @a14d1
groups 2
ports 1 1
wrmode 0 1
enable 0 2 @a10d18
enable 0 1 @a11d9 @a12d4 @a13d2 @a14d1
transp 0 0
clocks 2 3
clkpol 2 3
endbram
match $__XILINX_RAMB36_SDP
min bits 4096
min efficiency 5
shuffle_enable B
or_next_if_better
endmatch
match $__XILINX_RAMB18_SDP
min bits 4096
min efficiency 5
shuffle_enable B
or_next_if_better
endmatch
match $__XILINX_RAMB18_TDP
min bits 4096
min efficiency 5
shuffle_enable B
make_transp
endmatch