yosys/passes
Eddie Hung c90324662c
Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup
kernel: share a single CellTypes within a pass
2020-04-01 14:17:45 -07:00
..
cmds Merge pull request #1832 from boqwxp/cleanup_passes_cmds_design 2020-03-30 11:56:17 -07:00
equiv xilinx: Add xilinx_dffopt pass (#1557) 2019-12-18 13:43:43 +01:00
fsm fsm_extract: Initialize celltypes with full design. 2020-03-19 18:51:21 +01:00
hierarchy Fix double deletion in `passes/hierarchy/hierarchy.cc`. 2020-03-30 16:43:54 +00:00
memory memory_share: fix stray brace 2020-03-30 08:35:40 -07:00
opt Merge pull request #1828 from YosysHQ/eddie/celltypes_speedup 2020-04-01 14:17:45 -07:00
pmgen Merge pull request #1657 from YosysHQ/dave/xilinx-dsp-multonly 2020-02-02 14:53:32 +00:00
proc proc_dlatch: Add error handling for incorrect always_(ff|latch|comb) usage 2019-11-21 20:46:41 +00:00
sat Merge pull request #1835 from boqwxp/cleanup_sat_expose 2020-03-30 13:05:12 -07:00
techmap Merge pull request #1806 from YosysHQ/mwk/techmap-replace-fix 2020-03-26 19:03:37 +01:00
tests Document (* gentb_skip *) attr for test_autotb 2019-09-18 12:41:35 -07:00