yosys/tests/techmap
Clifford Wolf 924d9d6e86 Added read-enable to memory model 2015-09-25 12:23:11 +02:00
..
.gitignore
mem_simple_4x1_cells.v
mem_simple_4x1_map.v Added read-enable to memory model 2015-09-25 12:23:11 +02:00
mem_simple_4x1_runtest.sh Fixed yosys path in tests/techmap/mem_simple_4x1_runtest.sh 2014-03-11 11:59:58 +01:00
mem_simple_4x1_tb.v
mem_simple_4x1_uut.v
run-test.sh