mirror of https://github.com/YosysHQ/yosys.git
52 lines
2.4 KiB
C++
52 lines
2.4 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* ---
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*
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* A very simple and straightforward backend for the RTLIL text
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* representation.
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*
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*/
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#ifndef RTLIL_BACKEND_H
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#define RTLIL_BACKEND_H
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#include "kernel/yosys.h"
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#include <stdio.h>
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YOSYS_NAMESPACE_BEGIN
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namespace RTLIL_BACKEND {
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void dump_const(std::ostream &f, const RTLIL::Const &data, int width = -1, int offset = 0, bool autoint = true);
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void dump_sigchunk(std::ostream &f, const RTLIL::SigChunk &chunk, bool autoint = true);
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void dump_sigspec(std::ostream &f, const RTLIL::SigSpec &sig, bool autoint = true);
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void dump_wire(std::ostream &f, std::string indent, const RTLIL::Wire *wire);
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void dump_memory(std::ostream &f, std::string indent, const RTLIL::Memory *memory);
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void dump_cell(std::ostream &f, std::string indent, const RTLIL::Cell *cell);
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void dump_proc_case_body(std::ostream &f, std::string indent, const RTLIL::CaseRule *cs);
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void dump_proc_switch(std::ostream &f, std::string indent, const RTLIL::SwitchRule *sw);
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void dump_proc_sync(std::ostream &f, std::string indent, const RTLIL::SyncRule *sy);
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void dump_proc(std::ostream &f, std::string indent, const RTLIL::Process *proc);
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void dump_conn(std::ostream &f, std::string indent, const RTLIL::SigSpec &left, const RTLIL::SigSpec &right);
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void dump_module(std::ostream &f, std::string indent, RTLIL::Module *module, RTLIL::Design *design, bool only_selected, bool flag_m = true, bool flag_n = false);
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void dump_design(std::ostream &f, RTLIL::Design *design, bool only_selected, bool flag_m = true, bool flag_n = false);
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}
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YOSYS_NAMESPACE_END
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#endif
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