yosys/frontends/verilog
Clifford Wolf f53984795d Added support for non-standard """ macro bodies 2014-08-13 13:03:38 +02:00
..
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00
Makefile.inc Added "make PRETTY=1" 2014-07-24 17:15:01 +02:00
const2ast.cc Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00
lexer.l Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00
parser.y Also allow "module foobar(input foo, output bar, ...);" syntax 2014-08-07 16:41:27 +02:00
preproc.cc Added support for non-standard """ macro bodies 2014-08-13 13:03:38 +02:00
verilog_frontend.cc Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00
verilog_frontend.h Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace 2014-07-31 13:19:47 +02:00