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yosys/techlibs
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Clifford Wolf 11789db206 More support code for $sr cells 2013-03-14 11:15:00 +01:00
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.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
blackbox.sed initial import 2013-01-05 11:13:26 +01:00
simlib.v More support code for $sr cells 2013-03-14 11:15:00 +01:00
stdcells.v initial import 2013-01-05 11:13:26 +01:00
stdcells_sim.v initial import 2013-01-05 11:13:26 +01:00