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63060dcd2e
yosys
/
tests
/
hana
/
test_simulation_nand_1_test.v
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module
test
(
input
[
1
:
0
]
in
,
output
out
)
;
assign
out
=
~
(
in
[
0
]
&
in
[
1
]
)
;
endmodule
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