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628b994cf6
yosys
/
tests
/
hana
/
test_simulation_or_6_test.v
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module
test
(
input
[
3
:
0
]
in
,
output
out
)
;
assign
out
=
in
[
0
]
|
|
in
[
1
]
|
|
in
[
2
]
|
|
in
[
3
]
;
endmodule
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