Clifford Wolf 00a6c1d9a5 Major redesign of expr width/sign detecion (verilog/ast frontend)		2013-07-09 14:31:57 +02:00
..
.gitignore	added .gitignore files	2013-01-05 11:19:11 +01:00
Makefile.inc	initial import	2013-01-05 11:13:26 +01:00
const2ast.cc	Major redesign of expr width/sign detecion (verilog/ast frontend)	2013-07-09 14:31:57 +02:00
lexer.l	Added defparam support to Verilog/AST frontend	2013-07-04 14:12:33 +02:00
parser.y	Added defparam support to Verilog/AST frontend	2013-07-04 14:12:33 +02:00
preproc.cc	added option '-Dname[=definition]' to command 'read_verilog'	2013-05-19 17:07:52 +02:00
verilog_frontend.cc	Enabled AST/Verilog front-end optimizations per default	2013-06-10 13:19:04 +02:00
verilog_frontend.h	added option '-Dname[=definition]' to command 'read_verilog'	2013-05-19 17:07:52 +02:00