mirror of https://github.com/YosysHQ/yosys.git
331ac5285f
Right now neither `sat` nor `sim` have support for the `$check` cell. For formal verification it is a good idea to always run either async2sync or clk2fflogic which will (in a future commit) lower `$check` to `$assert`, etc. While `sim` should eventually support `$check` directly, using `async2sync` is ok for the current tests that use `sim`, so this commit also runs `async2sync` before running sim on designs containing assertions. |
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| .. | ||
| .gitignore | ||
| add_sub.ys | ||
| adffs.ys | ||
| counter.ys | ||
| dffs.ys | ||
| dsp.ys | ||
| fsm.ys | ||
| latches.ys | ||
| logic.ys | ||
| mem_gen.py | ||
| mem_tb.v | ||
| meminit.v | ||
| meminit.ys | ||
| mux.ys | ||
| run-test.sh | ||